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_______________general description the max801/max808 microprocessor (?) supervisory circuits monitor and control the activities of +5v ?s by providing backup-battery switchover, low-line indica- tion, and ? reset. additional features include a watch- dog for the max801 and cmos ram write protection for the max808. the max801/max808 offer a choice of reset-threshold voltage (denoted by suffix letter): 4.675v (l), 4.575v (n), and 4.425v (m). these devices are available in 8-pin dip and so packages. ________________________applications computers controllers intelligent instruments critical ? power monitoring portable/battery-powered equipment embedded systems ____________________________features ? precision voltage monitoring, ?.5% reset accuracy ? 200ms power-ok/reset time delay ? reset output (max808) reset and reset outputs (max801) ? watchdog timer (max801) ? on-board gating of chip-enable signals (max808): memory write-cycle completion 3ns ce gate propagation delay ? 1? standby current ? power switching: 250ma in v cc mode 20ma in battery-backup mode ? maxcap/supercap compatible ? reset guaranteed valid to v cc = 1v ? low-line threshold 52mv above reset threshold max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy ________________________________________________________________ maxim integrated products 1 0.1 m f 0.1 m f 0.1 m f m p power power for cmos ram nmi batt v cc out +5v gnd reset from i/o system or address decoder to cmos ram ce in ce out lowline reset max808 ? system __________typical operating circuit 19-1086; rev 0; 6/96 part* max801 _cpa max801_csa max801_epa -40? to +85? 0? to +70? 0? to +70? temp. range pin-package 8 plastic dip 8 so 8 plastic dip ______________ordering information for free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800 maxcap is a trademark of the carborundum corp. supercap is a trademark of baknor industries. pin configurations appear at end of data sheet. max801_esa max801_mja max808 _cpa 0? to +70? -55? to +125? -40? to +85? 8 so 8 cerdip** 8 plastic dip max808_csa 0? to +70? 8 so max808_epa max808_esa max808_mja -55? to +125? -40? to +85? -40? to +85? 8 plastic dip 8 so 8 cerdip** * these parts offer a choice of reset threshold voltage. from the table below, select the suffix corresponding to the desired threshold and insert it into the blank to complete the part number. **contact factory for availability and processing to mil-std-883. reset threshold (v) l 4.60 4.675 n 4.50 4.75 m 4.35 4.575 4.65 4.425 4.50 min max suffix typ
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v cc = 4.6v to 5.5v for the max80_l, v cc = 4.5v to 5.5v for the max80_n, v cc = 4.35v to 5.5v for the max80_m; v batt = 2.8v; t a = t min to t max . typical values are at v cc = 5v and t a = +25?, unless otherwise noted.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. input voltage (with respect to gnd) v cc .......................................................................-0.3v to +6v v batt ....................................................................-0.3v to +6v all other pins........................................-0.3v to (v out + 0.3v) input current v cc peak ..........................................................................1.0a v cc continuous ............................................................500ma i batt peak.....................................................................250ma i batt continuous ............................................................50ma gnd ................................................................................50ma all other inputs ...............................................................50ma output current out peak..........................................................................1.0a out continuous............................................................500ma all other outputs ............................................................50ma continuous power dissipation (t a = +70?) plastic dip (derate 9.09mw/? above +70?) ............727mw so (derate 5.88mw/? above +70?) .........................471mw cerdip (derate 8.00mw/? above +70?) .................640mw operating temperature ranges max801_c_a/max808_c_a...............................0? to +70? max801_e_a/max808_e_a ............................-40? to +85? max801_mja/max808_mja.........................-55? to +125? storage temperature range .............................-65? to +160? lead temperature (soldering, 10sec) .............................+300? max808 max801 v cc = 0v, v batt = 2.8v conditions ? 48 90 supply current in normal operating mode (excludes i out ) 68 110 v 0 x 5.5 operating voltage range v cc , batt (note 1) 0.4 1 5 ? 50 supply current in battery- backup mode (excludes i out ) (note 2) units min typ max symbol parameter i out = 25ma v cc - 0.02 i out = 250ma, max80_c/e i out = 250ma, max80_m v cc - 0.45 v cc = 4.5v v cc - 0.38 v cc - 0.25 v cc = 3v, v batt = 2.8v, i out = 100ma 1.0 1.5 v v cc - 0.25 v cc - 0.12 v out in normal operating mode 1.8 v cc = 3v, i out = 100ma 1.2 2.5 v cc to out on-resistance v batt = 2.8v, i out = 10ma v batt - 0.25 v batt - 0.12 v batt = 4.5v, i out = 20ma v batt - 0.16 v batt = 2.0v, i out = 5ma v cc = 0v v v batt - 0.20 v batt - 0.08 v out in battery-backup mode v batt = 2.8v, i out = 10ma 12 25 v batt = 4.5v, i out = 20ma 8 v batt = 2.0v, i out = 5ma v cc = 0v 16 40 batt to out on-resistance t a = +25? t a = t min to t max max80_c/e max80_m t a = +25? t a = t min to t max v batt + 0.2v v cc -0.1 0.1 -1.0 1.0 ? batt standby current (note 3) power-up power-down v batt = 2.8v v batt + 0.05 v batt v battery-switchover threshold 50 mv battery-switchover hysteresis max80_c/e v cc = 4.5v, i out = 250ma max80_m
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy _______________________________________________________________________________________ 3 electrical characteristics (continued) (v cc = 4.6v to 5.5v for the max80_l, v cc = 4.5v to 5.5v for the max80_n, v cc = 4.35v to 5.5v for the max80_m; v batt = 2.8v; t a = t min to t max . typical values are at v cc = 5v and t a = +25?, unless otherwise noted.) v cc rising and falling v cc rising v cc falling at 1mv/? i sink = 50?, v batt = 0v, v cc falling v cc falling at 1mv/? max80_m v cc falling max80_l max80_n conditions 0.1 0.4 reset output voltage 0.3 0.3 v 4.350 4.425 4.500 v rst reset threshold ms 140 200 280 t rp reset active timeout period ? 17 t ll v cc to lowline delay ? 17 t rd v cc to reset delay v 4.48 4.56 v ll lowline threshold, v cc rising mv 13 reset-threshold hysteresis mv 30 52 70 v lr lowline to reset threshold voltage 4.73 4.81 4.63 4.71 units min typ max symbol parameter max80_l max80_n 4.500 4.575 4.650 4.600 4.675 4.750 max80_m i source = 0.1ma v cc - 1.5 v cc - 0.1 v i sink = 3.2ma i source = 5ma, v cc = 4.25v 0.4 v v cc - 1.5 reset output voltage (max801) output sink current output source current, v cc = 4.25v i sink = 3.2ma, v cc = 4.25v i source = 5ma, v cc = 4.25v 0.4 v v cc - 1.5 lowline output voltage 55 ma 15 i sc reset output short- circuit current (max801) output sink current, v cc = 4.25v output source current 40 ma 20 i sc lowline output short-circuit current v cc = 1.0v, max80_c v cc = 1.2v, max80_e/m i sink = 3.2ma, v cc = 4.25v output sink current, v cc = 4.25v output source current 40 ma 1.6 i sc reset output short-circuit current 1.12 1.6 2.24 sec 0.75 x v cc t wd watchdog timeout period v ih v reset deasserted, wdi = 0v 0.8 -50 -10 v il wdi threshold voltage (note 4) ? reset deasserted, wdi = v cc 16 50 wdi input current v il = 0.8v, v ih = 0.75v x v cc 100 ns minimum watchdog input pulse width reset and low-line watchdog timer (max801)
40 -55 -15 65 v cc supply current vs. temperature (normal operating mode) 50 max801/808-01 temperature (?) v cc supply current ( m a) 25 105 -35 45 125 5 85 70 60 45 55 75 65 max808 max801 3.0 2.5 2.0 1.5 1.0 0.5 0 -60 -20 60 140 battery supply current vs. temperature (battery-backup mode) max801/808-02 temperature (?) battery supply current ( m a) 20 100 -40 40 120 080 6 5 4 3 2 1 0 -60 -20 60 140 max808 chip-enable propagation delay vs. temperature max801/808-03 temperature (?) propagation delay (ns) 20 100 -40 40 120 080 max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy 4 _______________________________________________________________________________________ note 1: either v cc or v batt can go to 0v if the other is greater than 2v. note 2: the supply current drawn by the max80_ from the battery (excluding i out ) typically goes to 15? when (v batt - 0.1v) < v cc < v batt . in most applications, this is a brief period as v cc falls through this region (see typical operating characteristics ). note 3: ??= battery-discharging current, ??= battery-charging current. note 4: wdi is internally connected to a voltage divider between v cc and gnd. if unconnected, wdi is typically driven to 1.8v, disabling the watchdog function. note 5: the chip-enable resistance is tested with v ce in = v cc / 2 and i ce in = 1ma. note 6: the chip-enable propagation delay is measured from the 50% point at ce in to the 50% point at ce out. note 7: if ce in goes high, ce out goes high immediately and stays high until reset is deasserted and ce in is low. electrical characteristics (continued) (v cc = 4.6v to 5.5v for the max80_l, v cc = 4.5v to 5.5v for the max80_n, v cc = 4.35v to 5.5v for the max80_m; v batt = 2.8v; t a = t min to t max . typical values are at v cc = 5v and t a = +25?, unless otherwise noted.) conditions enabled mode, v cc = v rst (max) 75 150 ce in to ce out resistance (note 5) units min typ max symbol parameter v cc = 4.25v, ce out = 0v ma 15 ce out short-circuit current ( reset active) v cc = 5v, c load = 50pf, 50 source-impedance driver ns 38 ce in to ce out propagation delay (note 6) v cc = 4.25v, i out = 2ma v 3.5 ce out output voltage high ( reset active) v cc falling, ce in = 0v ? 18 reset to ce out delay (note 7) v cc = 4.25v ?.00002 ? ? ce in leakage current v cc = 0v, i out = 10? v batt - 0.1 v batt chip-enable gating (max808) chip-enable gating (max808) __________________________________________typical operating characteristics (v cc = 5v, v batt = 2.8v, no load, t a = +25?, unless otherwise noted.)
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy _______________________________________________________________________________________ 5 0 50 w driver 2 4 6 8 0 50 100 max808 chip-enable propagation delay vs. ce out load capacitance max801/808-04 c load (pf) propagation delay (ns) 4.70 4.65 4.60 4.55 4.50 4.45 4.40 -60 -20 60 140 reset threshold vs. temperature max801/808-07 temperature (?) reset threshold (v) 20 100 -40 40 120 080 max80_l max80_n max80_m 30 5 -60 -20 60 140 batt to out on-resistance vs. temperature 10 25 max801/808-05 temperature (?) v batt to v out on-resistance ( w ) 20 100 -40 40 120 080 20 15 v batt = 2.0v v batt = 2.8v v batt = 4.5v v cc = 0v i out = 10ma 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -60 -20 60 140 v cc to out on-resistance vs. temperature max801/808-06 temperature (?) v cc to v out on-resistance ( w ) 20 100 -40 40 120 080 i out = 250ma 280 260 240 220 200 180 160 140 -60 -20 60 140 reset timeout period vs. temperature (v cc rising) max801/808-08 temperature (?) reset timeout period (ms) 20 100 -40 40 120 080 0 10 20 30 40 50 60 70 80 -60 -20 60 140 lowline to reset threshold vs. temperature (v cc falling) max801/808-09 temperature (?) lowline to reset threshold (mv) 20 100 -40 40 120 080 ____________________________typical operating characteristics (continued) (v cc = 5v, v batt = 2.8v, no load, t a = +25?, unless otherwise noted.) 4.75 4.80 4.70 4.65 4.60 4.55 4.50 4.45 4.40 -60 -20 60 140 lowline threshold vs. temperature (v cc rising) max801/808-10 temperature (?) lowline threshold (v) 20 100 -40 40 120 080 max80_l max80_n max80_m 0 5 10 15 20 25 30 35 40 -60 -20 60 140 lowline comparator propagation delay vs. temperature (v cc falling) max801/808-11 temperature (?) propagation delay ( s) 20 100 -40 40 120 080 v cc falling at 1mv/ s 0 5 10 15 20 25 30 35 40 -60 -20 60 140 reset comparator propagation delay vs. temperature (v cc falling) max801/808-12 temperature (?) propagation delay ( s) 20 100 -40 40 120 080 v cc falling at 1mv/ s
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy 6 _______________________________________________________________________________________ 0 2 4 6 8 10 12 14 16 2.5 2.6 2.7 2.8 2.9 3.0 battery current vs. input supply voltage max801/808-13 v cc (v) battery current ( a) 1000 100 10 1 1 100 10 1000 v cc to out voltage vs. output current max801/808-15 i out (ma) v cc to v out voltage (mv) slope = 1.0 w 1000 100 10 1 10 100 batt to out voltage vs. output current max801/808-14 i out (ma) v batt to v out voltage (mv) v cc = 0v slope = 12 w 1000 100 10 1 1 100 10 1000 maximum transient duration vs. reset threshold overdrive max801/808-16 reset threshold overdrive (mv) maximum transient duration ( s) reset occurs ____________________________typical operating characteristics (continued) (v cc = 5v, v batt = 2.8v, no load, t a = +25?, unless otherwise noted.) ______________________________________________________________pin description reset lowline v cc active-low reset output. reset is triggered and stays low when v cc is below the reset threshold (or during a watchdog timeout for the max801). it remains low 200ms after v cc rises above the reset threshold (or 200ms after the watchdog timeout occurs). reset has a strong pull-down but a relatively weak pull-up, and can be wire-or con- nected to logic gates. valid for v cc 3 1v. reset swings between v cc and gnd. 3 3 name low-line comparator output. this cmos-logic output goes low when v cc falls to 52mv above the reset threshold. use lowline to generate an nmi, initiating an orderly shut- down routine when v cc is falling. lowline swings between v cc and gnd. 2 2 input supply voltage, nominally +5v. bypass with a 0.1? capacitor to gnd. 1 1 max801 max808 function pin gnd ground 4 4
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy _______________________________________________________________________________________ 7 _________________________________________________pin description (continued) active-high reset output. reset is the inverse of reset . it is a cmos output that sources and sinks current. reset swings between v cc and gnd. 5 chip-enable output. output to the chip-enable gating circuit. ce out is pulled up to the higher of v cc or v batt when the chip-enable gate is disabled. 5 watchdog input. if wdi remains high or low longer than the watchdog timeout period (typically 1.6sec), reset will be asserted for 200ms. leave unconnected to disable the watchdog function. 6 chip-enable input 6 reset ce out wdi ce in batt out backup-battery input. when v cc falls below the reset threshold and v batt , out switch- es from v cc to batt. v batt may exceed v cc . the battery can be removed while the max801/max808 is powered up, provided batt is bypassed with a 0.1? capacitor to gnd. if no battery is used, connect batt to ground and v cc to out. 7 7 output supply voltage to cmos ram. when v cc exceeds the reset threshold or v batt , out connects to v cc . when v cc falls below the reset threshold and v batt , out con- nects to batt. bypass out with a 0.1? capacitor to gnd. 8 8 name max801 max808 function pin max801 max808 ce in gnd v cc batt the higher of v cc or v batt max801 only max808 only battery-backup comparator reset comparator low-line comparator 2.275v out lowline wdi reset (max801 only) reset ce out p p n watchdog transition detector state machine oscillator figure 1. functional diagram
max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy 8 _______________________________________________________________________________________ _______________detailed description the max801/max808 microprocessor (?) supervisory circuits provide power-supply monitoring and backup- battery switchover in ? systems. the max801 also provides program-execution watchdog functions (figure 1). use of bicmos technology results in an improved, 1.5% reset-threshold precision while keeping supply currents typically at 68? (48? for the max808). the max801/max808 are intended for bat- tery-powered applications that require high reset- threshold precision, allowing a wide power-supply operating range while preventing the system from oper- ating below its specified voltage range. reset and reset outputs the max801/max808? reset output ensures that the ? powers up in a known state, and prevents code- execution errors during power-down and brownout conditions. it does this by resetting the ?, terminating program execution when v cc dips below the reset threshold. each time reset is asserted, it stays low for at least the 200ms reset timeout period (set by an inter- nal timer) to ensure the ? has adequate time to return to an initial state. the internal timer restarts any time v cc goes below the reset threshold (v rst ) before the reset timeout period is completed. the watchdog timer on the max801 can also initiate a reset (see the max801 watchdog timer section). the reset output is active low, and is implemented with a strong pull-down/relatively weak pull-up structure. it is guaranteed to be a logic low for 0v < v cc < v rst , pro- vided v batt is greater than 2v. without a backup bat- tery, reset is guaranteed valid for v cc 3 1v. the reset output is the inverse of the reset output; it both sources and sinks current and cannot be wire-or connected. low-line comparator the low-line comparator monitors v cc with a threshold voltage typically 52mv above the reset threshold, with 13mv of hysteresis. use lowline to provide a non- maskable interrupt (nmi) to the ? when power begins to fall, initiating an orderly software shutdown routine. in most battery-operated portable systems, reserve ener- gy in the battery provides ample time to complete the shutdown routine once the low-line warning is encoun- tered and before reset asserts. if the system must con- tend with a more rapid v cc fall time (such as when the main battery is disconnected, when a dc-dc converter shuts down, or when a high-side switch is opened dur- ing normal operation), use capacitance on the v cc line to provide time to execute the shutdown routine (figure 3). first calculate the worst-case time required for the system to perform its shutdown routine. then, with worst-case shutdown time, worst-case load current, and minimum low-line to reset threshold (v lr(min) ), v reset v lowline v cc v reset (max801) v ce out (max808) v rst v ll t rp t rp v batt shown for v cc = 0v to 5v, v batt = 2.8v, ce in = gnd figure 2a. timing diagram, v cc rising v reset v lowline v cc v reset (max801) v ce out (max808) v rst v rst + v lr v batt t rce t rd t rd t ll shown for v cc = 5v to 0v, v batt = 2.8v, ce in = gnd figure 2b. timing diagram, v cc falling
calculate the amount of capacitance required to allow the shutdown routine to complete before reset is asserted: c hold = (i load x t shdn ) / (v lr(min) ) where t shdn is the time required for the system to com- plete the shutdown routine (including the v cc to low- line propagation delay), i load is the current being drained from the capacitor, and v lr is the low-line to reset threshold. output supply voltage the output supply (out) transfers power from v cc or batt to the ?, ram, and other external circuitry. at the maximum source current of 250ma, v out will typi- cally be 220mv below v cc . decouple out with a 0.1? capacitor to ground. battery-backup mode battery-backup mode preserves the contents of ram in the event of a brownout or power failure. with a backup battery installed at batt, the max801/max808 automati- cally switches ram to backup power when v cc falls. two conditions are required for switchover to battery- backup mode: 1) v cc must be below the reset threshold; 2) v cc must be below v batt . table 1 lists the status of inputs and outputs during battery-backup mode. batt is designed to conduct up to 20ma to out dur- ing battery backup. the pmos switch on-resistance is approximately 12 . figure 4 shows the two series pass elements (between the batt input and out) that facilitate ul recognition. v batt can exceed v cc during normal operation without causing a reset. max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy _______________________________________________________________________________________ 9 gnd v cc to m p nmi c hold c hold > i load x t shdn v lr 4.5v to 5.5v lowline max801 max808 regulator figure 3. using lowline to provide a power-fail warning to the ? max801 max808 p pp out v cc batt 0.1 m f control circuitry figure 4. v cc and batt to out switch reset logic low 3 3 reset logic high; the open-circuit voltage is equal to v cc . v cc pin 5 gnd lowline ground?v reference for all signals 4 4 wdi wdi is ignored and goes high impedance. 6 batt supply current is 1? max for v batt 2.8v. 7 7 ce in ce out high impedance (max808) 6 logic high. the open-circuit output voltage is equal to v batt (max808). 5 out out is connected to batt through two internal pmos switches in series. name 8 8 battery switchover comparator monitors v cc for active switchover. 1 1 logic low 2 2 max801 max808 status table 1. input and output status in battery-backup mode
max801l/m/n, max808l/m/n max801 watchdog timer the watchdog monitors the ?? activity. if the ? does not toggle the watchdog input (wdi) within 1.6sec, reset asserts for the reset timeout period. the internal 1.6sec timer is cleared when reset asserts or when a transition (low-to-high or high-to-low) occurs at wdi while reset is not asserted. the timer remains cleared and does not count as long as reset is asserted. it starts counting as soon as reset is released (figure 5). supply current is typically reduced by 10? when wdi is at a valid logic level. to disable the watchdog func- tion, leave wdi unconnected. an internal voltage divider sets wdi to about mid-supply, disabling the watchdog timer/counter. max808 chip-enable gating the max808 provides internal gating of chip-enable (ce) signals to prevent erroneous data from corrupting cmos ram in the event of a power failure. during nor- mal operation, the ce gate is enabled and passes all ce transitions. when reset is asserted, this path becomes disabled, preventing erroneous data from corrupting the cmos ram. the max808 uses a series transmission gate from the chip-enable input ( ce in) to the chip-enable output ( ce out) (figure 1). the 8ns max chip-enable propagation from ce in to ce out enables the max808 to be used with most ?s. the max808 also features write-cycle-completion cir- cuitry. if v cc falls below the reset threshold while the ? is writing to ram, the max808 holds the ce gate enabled for 18? to allow the ? to complete the write instruction. if the write cycle has not completed by the end of the 18? period, the ce transmission gate turns off and ce out goes high. if the ? completes the write instruction during the 18? period, the ce gate turns off (high impedance) and ce out goes high as soon as the ? pulls ce in high. ce out remains high, even if ce in falls low for any reason (figure 6). chip-enable input ce in is high impedance (disabled mode) while reset is asserted. during a power-down sequence when v cc passes the reset threshold, the ce transmission gate disables. ce in becomes high impedance 18? after reset asserts, provided ce in is still low. if the ? com- pletes the write instruction during the 18? period, the ce gate turns off. ce in becomes high impedance as soon as the ? pulls ce in high. ce in remains high impedance even if the signal at ce in falls low (figure 6). during a power-up sequence, ce in remains high impedance (regardless of ce in activity) until reset is deasserted following the reset timeout period. in high-impedance mode, the leakage currents into this input are ?? max over temperature. in low-imped- ance mode, the impedance of ce in appears as a 75 resistor in series with the load at ce out. the propagation delay through the ce transmission gate depends on both the source impedance of the drive to ce in and the capacitive loading on ce out (see the chip-enable propagation delay vs. ce out load capacitance graph in the typical operating characteristics ). the ce propagation delay is produc- tion tested from the 50% point on ce in to the 50% point on ce out using a 50 driver and 50pf of load capacitance (figure 7). for minimum propagation delay, minimize the capacitive load at ce out and use a low-output-impedance driver. 8-pin ? supervisory circuits with ?.5% reset accuracy 10 ______________________________________________________________________________________ v cc reset wdi t rp t rp t wd figure 5. watchdog timing v cc ce in reset threshold ce out reset 17 m s 18 m s18 m s 17 m s figure 6. chip-enable timing
chip-enable output in enabled mode, ce out? impedance is equivalent to 75 in series with the source driving ce in. in disabled mode, the 75 transmission gate is off and ce out is actively pulled to the higher of v cc or v batt . the source turns off when the transmission gate is enabled. __________applications information the max801/max808 are not short-circuit protected. shorting out to ground, other than power-up transients such as charging a decoupling capacitor, may destroy the device. if long leads connect to the ic? inputs, ensure that these lines are free from ringing and other conditions that would forward bias the ic? protection diodes. bypass out, v cc , and batt with 0.1? capacitors to gnd. the max801/max808 operate in two distinct modes: 1) normal operating mode, with all circuitry powered up. typical supply current from v cc is 68? (48? for the max808), while only leakage currents flow from the battery. 2) battery-backup mode, where v cc is below v batt and v rst . the supply current from the battery is typ- ically less than 1?. using supercaps or maxcaps with the max801/max808 batt has the same operating voltage range as v cc , and the battery-switchover threshold voltage is typically v batt when v cc is decreasing or v batt + 0.05v when v cc is increasing. this hysteresis allows use of a supercap (e.g., around 0.47f) and a simple charging circuit as a backup source (figure 8). since v batt can exceed v cc while v cc is above the reset threshold, no special precautions are needed when using these ? supervisors with a supercap. backup-battery replacement the backup battery can be disconnected while v cc is above the reset threshold, provided batt is bypassed with a 0.1? capacitor to ground. no precautions are necessary to avoid spurious reset pulses. negative-going v cc transients while issuing resets to the ? during power-up, power- down, and brownout conditions, these supervisors are relatively immune to short-duration, negative-going v cc transients (glitches). it is usually undesirable to reset the ? when v cc experiences only small glitches. the typical operating characteristics show a graph of maximum transient duration vs. reset threshold overdrive, for which reset pulses are not generated. the graph was produced using negative-going v cc pulses, starting at 5v and ending below the reset threshold by the magnitude indicated (reset compara- tor overdrive). the graph shows the maximum pulse width that a negative-going v cc transient may typically have without causing a reset pulse to be issued. as the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. typically, a v cc transient that goes 40mv below the reset threshold and lasts for 3? or less will not cause a reset pulse to be issued. a 0.1? bypass capacitor mounted close to the v cc pin provides additional transient immunity. max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy ______________________________________________________________________________________ 11 max808 ce in 50pf c load ce out gnd v rst (max) 50 w driver v cc figure 7. max808 ce gate test circuit max801 max808 0.47f 1n4148 +5v v cc gnd batt out figure 8. using the max801/max808 with a supercap
maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 (408) 737-7600 1996 maxim integrated products printed usa is a registered trademark of maxim integrated products. max801l/m/n, max808l/m/n 8-pin ? supervisory circuits with ?.5% reset accuracy watchdog software considerations to help the watchdog timer keep a closer watch on software execution, you can set and reset the watch- dog input at different points in the program, rather than ?ulsing?the watchdog input high-low-high or low-high- low. this technique avoids a ?tuck?loop, where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. figure 9 shows a sample flow diagram where the i/o driving the watchdog input is set high at the beginning of the program, low at the beginning of every subrou- tine or loop, then high again when the program returns to the beginning. if the program should ?ang?in any subroutine, the i/o would be continually set low and the watchdog timer would be allowed to time out, causing a reset or interrupt to be issued. maximum v cc fall time the v cc fall time is limited by the propagation delay of the battery switchover comparator and should not exceed 0.03v/?. a standard rule for filter capacitance on most regulators is around 100? per ampere of cur- rent. when the power supply is shut off or the main bat- tery is disconnected, the associated initial v cc fall rate is just the inverse, or 1a/100? = 0.01v/?. start set wdi low subroutine or program loop, set wdi high return end figure 9. watchdog flow diagram _________________pin configurations wdi reset reset gnd 1 2 8 7 out batt lowline v cc max801 dip/so 3 4 6 5 ce in reset ce out gnd 1 2 8 7 out batt lowline v cc max808 dip/so top view 3 4 6 5 ___________________chip information transistor count: 922

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